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Research Paper

Sliding Mode Controller with Modified Sliding Function of Buck Converter Dc-Dc

The dc-dc buck converter is some of the most widely used power electronics circuit for its high conversion efficiency and flexible output voltage. These converter used for electronic device are designed to regulate the output voltage against the change of the input voltage and load current. This leads to the requirement of more advanced control method to meet the real demand .The controller offers advantage such as fixed switching frequency and zero steady state error and give a better small signal performance at the designed operating point but under large parameter and load variation their performance degrades so sliding mode control technique are well suited to dc-dc converter as they are inherently variable structure system .SM controlled converter generally suffer from switching frequency variation when the input voltage and output load are varied. A comparison of the effect of PWM controller and SM control of the dc-dc buck converter response in steady state under line variation and load variation is performed. The comparison with the PWM controller the SM control provides better steady state response, better dynamic response and robustness against system uncertainty disturbance. The converter with conventional sliding mode result in steady state error in load voltage.

Published by: Mahalakshmi .S, P. Vasanth Kumar, Dr. N. J. R Muniraj

Author: Mahalakshmi .S

Paper ID: V3I6-1193

Paper Status: published

Published: November 7, 2017

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Research Paper

Efficient Implementation of 2-Bit Magnitude Comparator Using PTL

Nowadays the requirements of low power electronics play a vital role in various fields. In this paper we introducing the novel comparator is one of the fundamental units in VLSI design and also it can be employed in various applications like Digital Signal Processors (DSP) and Data Processing, Communication Systems, Medical Electronics etc., Comparator is involved to the most basic arithmetic operation of compression between any two variables either it may be an equal one or unequal. In early days, the comparator techniques used to implement energy optimization in low power circuits but the static power dissipation need to improve the comparator using logic styles. In this paper, the 2-bit comparator has been designed by using pass-transistor logic (PTL). PTL provide good performance by reducing transistor count as well as power because PTL logic helps in reducing the transistor count compared to other logic operation. The design was implemented in Cadence virtuoso TMSC 180nm CMOS technology and it’s obtaining the total power dissipation 1.394µw. PTL logic is used to reduce both transistor count and power dissipation in magnitude comparator is used to improve the good quality performance of this circuit.

Published by: S. Bhuvaneswari, R. Prabakaran, Dr. N. J. R Muniraj

Author: S. Bhuvaneswari

Paper ID: V3I6-1197

Paper Status: published

Published: November 7, 2017

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Review Paper

MPLS VPN using VRF (Virtual Routing and Forwarding )

Multi-Protocol Label Switching (MPLS) which was introduced by Internet Engineering Task Force (IETF) is usually used in communication networks which started attracting all the internet service provider(ISP) networks with its brilliant and excellent features that provide quality of services (QOS)and guarantees to traffic which carries data from one network to another network directly through labels. Virtual Private Network (VPN) is one of the highly useful MPLS applications which allow a service provider or a large enterprise network to offer network Layer VPN services that guarantee and carries traffic securely and privately from customer’s one to another through the service provider’s network. To support multiple customers that Customers Request for secure, reliable, private and ultrafast connections over the internet MPLS VPN standards include the concept of a virtual router. This feature called a VRF table. VRF or Virtual routing and Forwarding technology that permit a router to have various routing table or multiple VPN at the same time that they are located in the same router but they are independent and Also the VRF feature in VPN now allows different customers to use same IP addresses connected to the same ISP. A VRF exists inside a single MPLS router and typically routers need at least one VRF for each customer attached to that particular router.

Published by: Samiullah Mehraban, Prof. Komil B. Vora, Prof. Darshan Upadhyay

Author: Samiullah Mehraban

Paper ID: V3I6-1169

Paper Status: published

Published: November 7, 2017

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Research Paper

IOT Based Theft Detection using Raspberry Pi

Security and safety has always become a basic necessity for urban population. To Monitor and to detect we use CCTV camera’s. In surveillance, CCTV camera is costly because of the use of computer. It reserves too much space for continues recording and also require manpower to detect the unauthorized Activity. To overcome, we came across with Raspberry PI using IOT. Compare to Existing System Raspberry Pi is much cheaper with better resolution and low power consumption features. This Project “IOT based theft detection project using Raspberry Pi” where we use image processing on live video to detect theft using motion and also highlight the area where motion occurred. In this system, we use a camera along with raspberry pi along with a circuit with LCD display IR for night vision and USB drive for storage. As soon as camera motion is detected in camera, the system uses image processing to detect exact area of motion occurrence and highlights it accordingly. The system now transmits the images of the occurrence over IOT to be viewed by user online. Also, it stores the footage in a USB drive for further reference. The user can now decode the data sent online using IOT, IOT system to view the images of the motion occurrence live remotely over internet. Thus, the system provides an innovative approach to Theft Detection using IOT.

Published by: Umera Anjum, B. Babu

Author: Umera Anjum

Paper ID: V3I6-1188

Paper Status: published

Published: November 7, 2017

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Research Paper

Effect of Jaggery on Strength of Concrete

Concrete is a composite material used in the grounds that all considerate designing structures are developed with concrete. This report accentuation that by utilizing locally accessible materials like jaggery, may enhance the properties of concrete. The experiment has been completed for assessing the quality properties of concrete utilizing Jaggery as admixtures into the concrete creation. Normally these sorts of admixtures utilized as a part of the extraordinary cases like huge wharf and long heaps. Four unique rates of admixtures (Jaggery) are picked in the experimentation as, 0.1%, 0.2%, 0.3%and 0.4% by weight of cement with M20 and M25 grade, mix design of concrete. At last it was presumed that work-ability and compressive strength of concrete upgraded when admixtures Jaggery included into the concrete synthesis.

Published by: Fouziya Qureshi, Anil Kumar Saxena, Gourav Soni

Author: Fouziya Qureshi

Paper ID: V3I6-1201

Paper Status: published

Published: November 7, 2017

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Research Paper

Implementation of Pull-Up/Pull-Down Network for Energy Optimization in Full Adder Circuit

Nowadays the requirements of energy-optimized low power circuits in higher-end applications such as communication, IoT, biomedical systems etc., there are several techniques used to implement energy optimization in low power circuits but the static power dissipation needs to improved such kind of circuits. The conventional topology has been implemented in basic logical gates but the delay and power much higher in each individual cell. Now we proposed an unbalanced pull-up and pull-down network in full adder circuit using symbols. These techniques were employed to reduce the static power dissipation and switching delay in each individual cell. The design was implemented in Cadence virtuoso TMSC 180nm CMOS technology and it’s obtaining the total power dissipation 5.128nW. The pull-up and pull-down network used to reduce the static power dissipation in full adder is used to improve the operating speed of each individual.

Published by: P. Aarthi, R. Suresh Kumar, Dr. N. J. R Muniraj

Author: P. Aarthi

Paper ID: V3I6-1198

Paper Status: published

Published: November 7, 2017

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