This paper is published in Volume-4, Issue-3, 2018
Area
Analog Circuits
Author
Sanket Yenare, Dr. Abhay Chopade, Siddesh Patil, Sachin Doge
Org/Univ
Vishwakarma Institute of Technology, Pune, Maharashtra, India
Pub. Date
18 May, 2018
Paper ID
V4I3-1231
Publisher
Keywords
Low noise amplifier, Gain, Noise figure, Impedance matching.

Citationsacebook

IEEE
Sanket Yenare, Dr. Abhay Chopade, Siddesh Patil, Sachin Doge. Study of low-noise amplifier in CMOS technology, International Journal of Advance Research, Ideas and Innovations in Technology, www.IJARIIT.com.

APA
Sanket Yenare, Dr. Abhay Chopade, Siddesh Patil, Sachin Doge (2018). Study of low-noise amplifier in CMOS technology. International Journal of Advance Research, Ideas and Innovations in Technology, 4(3) www.IJARIIT.com.

MLA
Sanket Yenare, Dr. Abhay Chopade, Siddesh Patil, Sachin Doge. "Study of low-noise amplifier in CMOS technology." International Journal of Advance Research, Ideas and Innovations in Technology 4.3 (2018). www.IJARIIT.com.

Abstract

This paper presents the reviews of few previous works for low noise amplifier design (LNA). This paper will explore several architectures of LNA that focus on the frequency optimization of LNA. Besides, high gain, low noise, input and output matching are also reviewed. As to provide extremely low power and also optimized all characteristics aspects, the performance for each topology is discussed. Also, some basic LNA topologies are also reviewed.