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Research Paper

Impact of strategic learning dimensions on academic entrepreneurship for Iraqi higher education institutions

The main objective of this study is to analyze the impact of strategic learning dimensions on academic entrepreneurship for Iraqi higher education institutions . For this purpose, we work with a sample of 113 respondents in university in Iraq. In this context, four dimensions of strategic learning and entrepreneurship, based on a set of weighted factors. The results of the study show that the university presents strategic knowledge interpretation and creation in a high degree, while strategic knowledge implementation and distribution are presented in a medium degree. On the other hand, the dimensions of strategic learning have a positive influence on the academic entrepreneurship of institutions.

Published by: Dr. Jinan Mahdi Aldahhan, Zayad Ali Abbas, Ghaidaa Mohammed Ali Albayati

Author: Dr. Jinan Mahdi Aldahhan

Paper ID: V4I6-1224

Paper Status: published

Published: November 20, 2018

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Research Paper

Computer aided analysis on the effect of carbon fiber in disc brake

The paper describes the design of carbon fiber-epoxy resin brake rotor for disk brake arrangement and analysis it using ANSYS. This design process is carried out by using computer-aided design (CAD) software. Furthermore, the analysis is performed by using ANSYS software. The main objective of the project is to design and analyze the thermal and structural stress distribution of brake rotor at the real-time condition during the braking process. The study of stress distribution in Brake disk while running condition is carried out for the carbon fiber material and it is compared with the existing one. The optimization is carried out to reduce the stress concentration and weight of the brake rotor which keeps the unsprung mass low thereby increasing the stability of the vehicle. The structural model of brake rotor is developed in CATIA software with the material of carbon fiber. In addition to this Silicon Carbide is added to increase the wear resistance of the brake rotor. The composite consists of mainly two-phase i.e. matrix and fiber. The major outcome of the paper is to study the different stress distribution in the brake disk using carbon fiber and compare with the conventional brake disk with the temperature, stress distribution, and weight. Fiber reinforced polymer composites have numerous preferences, for example, a generally minimal fort of creation, simple to create and better quality contrast than perfect polymer tars due with this reason fiber is used enormous usage in the material to strengthened.

Published by: Saravanakumar S., P. Sakthivel, S. Naveen Venkatesh

Author: Saravanakumar S.

Paper ID: V4I6-1222

Paper Status: published

Published: November 20, 2018

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Research Paper

Hybrid technique to enhance image for better image segmentation

Segmentation is a technique to break the image into parts. But to get better segmentation there is a condition that image must be free from noise. To get image free from noise denoising model is used which remove the noise by producing the required pixel and also correct the incorrect pixel. Here image taken is an X-ray image, In this paper, the 3x3 matrix window is taken. In this window average of the pixel value is calculated. This algorithm rechecks the best fitness value of each pixel and makes appropriate changes. But due to Recovery, it needs some enhancement. So to get enhanced image enhancement technique is applied to enhance the image as an original image. Then the segmentation is applied to get a segmented image. The performance of the proposed model has been estimated under various experiments. The results are found improved for all of the dataset images on the basis of PSNR (peak signal to noise ratio) and SSIM (structural similarity) based parameters.

Published by: Rajesh Kumar, Pankaj Sharma, Puneet Jain

Author: Rajesh Kumar

Paper ID: V4I6-1201

Paper Status: published

Published: November 17, 2018

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Research Paper

Review on relationship between compiler design and computer architecture

A compiler is a software structure which achieves the job of compiling and executing High-Level Language codes with the hardware computer architectures present. Previously, applications were often made through assembly language programming or for a specific kernel. Compiler technology and its influence on hardware performance were isolated from the architecture and its performance. However, now the compiler significantly affects the performance of a computer. Hence, understanding compiler technology is critical to the design and efficient implementation of an instruction set. Although the compilers are designed as per the language to be executed upon, their efficient functioning very much depends on the hardware used. A perfect balance between compilers and computer architectures, which varies according to the code to be executed, is the key to fruitful designing of highly efficient and effective computer systems. It is very imperative to study the relations of computer architecture and compiler from embedded microcontrollers to large-scale multiprocessor systems. There are some aspects to which the compiler and the computer architecture must agree, such as regularity, orthogonality, and compensability. So, the construction of a good compiler rests on both compiler design and computer architecture. There is an evident mutual dependency.

Published by: Punit Mishra, Ruturaj Sahu, Rahul Dev Singh, P. Sanjeevi

Author: Punit Mishra

Paper ID: V4I6-1219

Paper Status: published

Published: November 17, 2018

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Research Paper

The survey of concepts of architecture in RISC and CISC computers

In the ever-growing world of computer architecture, Instruction Set Architecture (ISA) is one of the major components of a computer system, as it provides the information about the instructions present in the system prior to the programmer. Having various implementations and uses it is classified into various categories, RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) being two, both being a bit different in their basic architecture and working. Both CISC and RISC architectures continue to be widely used. The research topic on CISC and RISC has been a well-known research area for many years. Since modern processors have to address both power consumption and performance, it is important to compare these architectures to support future project decisions. Our paper also includes basic details regarding the various addressing modes, instruction formats along with the instruction execution cycle giving detailed information about RISC and CISC processors simultaneously.

Published by: Muskan Saxena, Ojaswini Nimbalkar, Vidhi Jaiswal, Vishakha Pandey, P. Sanjeevi

Author: Muskan Saxena

Paper ID: V4I6-1218

Paper Status: published

Published: November 17, 2018

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Research Paper

A review at storage systems and pipelining

An external storage device is a device that contains all the addressable storage that is not inside computers main memory. It has types including removable and non-removable, permanent and non-permanent. External storage is often used to store information that's accessed less frequently by applications running on a desktop, laptop, server or mobile devices, such as an Android or iOS smartphone or tablet. When moving large amounts of data to the cloud, providers will usually use external storage devices in a practice commonly referred to as cloud seeding. Pipelining is an implementation technique in which more than one instruction is overlapped in execution. The computer pipeline is divided into stages. Each stage performs and finishes a part of an instruction in parallel. The stages are related and connected one to the next to form a pipe - instructions enter at one end, progress through the stages, and exit at the other end. Pipelining does not decrease the time span essential for individual instruction execution. Instead, it enhances instruction throughput. The throughput of the instruction pipeline is estimated and evaluated by how often an instruction exits the pipeline. Under these constraints, the progress rate from pipelining equals the number of pipe stages. Usually, the stages will not be accurately well balanced; besides, the pipelining itself involves some overlook on the inner aspect. Pipelining is usually viewed as reducing the C.P.I. (Cycles Per Interval)

Published by: Yogesh Sigar, Shubham Malhotra, Soyal Sharma, Shetty Manvith, P. Sanjeevi

Author: Yogesh Sigar

Paper ID: V4I6-1217

Paper Status: published

Published: November 17, 2018

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