- A method illustrated in this is to design carry look ahead adders using SCMOS technology, also analyzed the effect of various parameters on the characteristics of adders, using 50 nm, spice model for CMOS technology. The design was implemented for 16 bit and then extended for 32 bit also. Here parameters are computed and response curves are computed between all characteristics, DC and transient characteristics. The design and simulations are carried out to achieve these values approximately. Design will be carried out in Electric CAD and Xilinx. Simulation results are verified using Modelsim and LTSpice. The DRC, LVS/NCC, transient checks are performed in the proposed design. Noise analysis is also done. In comparison with the existing full adder designs, the present implementation will offer significant improvement in terms of frequency.