This paper is published in Volume-4, Issue-1, 2018

Area
VLSI
Author
Merlyn Mariyam Varghese
Co-authors
Kusumam Joseph
Org/Univ
Musaliar College of Engineering and Technology, Pathanamthitta, Kerala, India
Pub. Date
January 12, 2018
Paper ID
V4I1-1198
Publisher
Keywords
2 Stage OP-AMP, CMOS, Gain, Phase Margin, Unity Gain Band Width.

Citations

IEEE
Merlyn Mariyam Varghese, Kusumam Joseph. Design of Low Voltage two Stage CMOS Operational Amplifier, International Journal of Advance Research, Ideas and Innovations in Technology, www.IJARIIT.com.

APA
Merlyn Mariyam Varghese, Kusumam Joseph (2018). Design of Low Voltage two Stage CMOS Operational Amplifier. International Journal of Advance Research, Ideas and Innovations in Technology, 4(1) www.IJARIIT.com.

MLA
Merlyn Mariyam Varghese, Kusumam Joseph. "Design of Low Voltage two Stage CMOS Operational Amplifier." International Journal of Advance Research, Ideas and Innovations in Technology 4.1 (2018). www.IJARIIT.com.

Abstract

The method that presented in this paper is to design a low voltage CMOS operational amplifier, which operates at the ±1V power supply. Due to this, the demand for low voltage silicon chip systems has been increased. The supply voltage is scaled down to reduce the overall power consumption of the system. The objective of this project is to design a low voltage CMOS operational amplifier. The designed OP-AMP is a two-stage CMOS OP-AMP which exhibits a gain of 59.50 dB, the phase margin of 79.431 and unity gain bandwidth is 7.717 KHz. Design and Simulation have been carried out in LT Spice tools.
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