This paper is published in Volume-4, Issue-6, 2018
Area
Computer Science Engineering
Author
Mudit Jain
Co-authors
Devansh Patil, Tanay Parikh, Ayush Naidu, P Sanjeevi
Org/Univ
VIT Bhopal University, Bhopal, Madhya Pradesh, India
Pub. Date
17 November, 2018
Paper ID
V4I6-1213
Publisher
Keywords
DRAM, SRAM, Cache memory, Memory hierarchy

Citationsacebook

IEEE
Mudit Jain, Devansh Patil, Tanay Parikh, Ayush Naidu, P Sanjeevi. Review on memory divisions in computer architecture, International Journal of Advance Research, Ideas and Innovations in Technology, www.IJARIIT.com.

APA
Mudit Jain, Devansh Patil, Tanay Parikh, Ayush Naidu, P Sanjeevi (2018). Review on memory divisions in computer architecture. International Journal of Advance Research, Ideas and Innovations in Technology, 4(6) www.IJARIIT.com.

MLA
Mudit Jain, Devansh Patil, Tanay Parikh, Ayush Naidu, P Sanjeevi. "Review on memory divisions in computer architecture." International Journal of Advance Research, Ideas and Innovations in Technology 4.6 (2018). www.IJARIIT.com.

Abstract

This Research Paper is totally concentrated to define different memory systems that are present in the market, and what is their importance in today’s generation. In this paper, we review the different hierarchies of the memory systems. It talks about cache-memory based systems and its various levels. Cache memories along with the virtual memories and processor registers form a field of memory hierarchies that depends on the principle of locality of reference. Most applications show the temporal and spatial zones among order and data. Then it describes about RAM (Random Access Memory) and its types which include DRAM (Dynamic Random-Access Memory) and SRAM (Static Random-Access Memory), it also describes the flash memory and its importance because of its small size and large memory containing abilities Memory hierarchies are intended to keep most likely referenced items in the fastest devices.
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