This paper is published in Volume-3, Issue-3, 2017
Area
Image Processing
Author
Deepak Raj, Dr. Poonam Singal
Org/Univ
Deenbandhu Chhotu Ram University of Science and Technology, Haryana, India
Pub. Date
19 May, 2017
Paper ID
V3I3-1328
Publisher
Keywords
Computational Cost, Verilog Hardware, LUT, Gaussian Smoothing Filter, FPGA

Citationsacebook

IEEE
Deepak Raj, Dr. Poonam Singal. Reducing the Computational Complexity Of A 2d Gaussian Filter for Image Processing (An Overview), International Journal of Advance Research, Ideas and Innovations in Technology, www.IJARIIT.com.

APA
Deepak Raj, Dr. Poonam Singal (2017). Reducing the Computational Complexity Of A 2d Gaussian Filter for Image Processing (An Overview). International Journal of Advance Research, Ideas and Innovations in Technology, 3(3) www.IJARIIT.com.

MLA
Deepak Raj, Dr. Poonam Singal. "Reducing the Computational Complexity Of A 2d Gaussian Filter for Image Processing (An Overview)." International Journal of Advance Research, Ideas and Innovations in Technology 3.3 (2017). www.IJARIIT.com.

Abstract

The 2D Gaussian filter is one of the very useful techniques in image processing, this technique is very useful especially in image smoothing. Basically, the implementation of 2D Gaussian filter needs heavy computational resources, When this type of technique comes down to real time applications, efficiency in the implementation is vital. An obstacle for this is floating-point math representation, as it requires a heavy amount of computational power to achieve real-time image processing. On the other hand, a fixed-point approach is more satisfactory. By using fixed-point arithmetic, we increase the speed as well as efficiency in many ways. We also reduce the area of hardware by reducing the LUTs.