This paper is published in Volume-3, Issue-2, 2017
Area
Floating Point Multiplier
Author
Mukesh Krishna .R
Co-authors
Mohana Priya .S, Manicka Vasagam .P, Dr. B. Vinoth Kumar
Org/Univ
Dr. Mahalingam College of Engineering and Technology, Pollachi, Tamil Nadu, India
Pub. Date
17 March, 2017
Paper ID
V3I2-1190
Publisher
Keywords
Dot-Product Unit Fused Floating Point Operations, Booth Multiplier Normalization, Rounding Operations, Latency and VHDL.

Citationsacebook

IEEE
Mukesh Krishna .R, Mohana Priya .S, Manicka Vasagam .P, Dr. B. Vinoth Kumar. Analysing Two-Term Dot Product of Multiplier Using Floating Point and Booth Multiplier, International Journal of Advance Research, Ideas and Innovations in Technology, www.IJARIIT.com.

APA
Mukesh Krishna .R, Mohana Priya .S, Manicka Vasagam .P, Dr. B. Vinoth Kumar (2017). Analysing Two-Term Dot Product of Multiplier Using Floating Point and Booth Multiplier. International Journal of Advance Research, Ideas and Innovations in Technology, 3(2) www.IJARIIT.com.

MLA
Mukesh Krishna .R, Mohana Priya .S, Manicka Vasagam .P, Dr. B. Vinoth Kumar. "Analysing Two-Term Dot Product of Multiplier Using Floating Point and Booth Multiplier." International Journal of Advance Research, Ideas and Innovations in Technology 3.2 (2017). www.IJARIIT.com.

Abstract

ABSTRACT: The Floating Point in two-term Dot-Product of multiplier referred as discrete design. Floating Point is a wide variety for increasing accuracy, high speed, high performance and reducing delay, area and power consumption. This application of floating point is used for algorithms of Digital Signal Processing and Graphics. Many floating point application is to reduce area, from the survey the fused floating point gives better performance using both the single precision and the double precision in multiplication, addition, and subtraction. The scientific notations sign bit, mantissa and exponent are used. The real numbers are divided into two, fixed component of significant range (lack of dynamic range) and exponential component in floating point (largest dynamic range). Converting decimal to fused floating point and normalize the exponent part and rounding operation for reducing latency. The other operation is compared by booth multiplication. It is also used for reduction of area and power. That multiplies two signed binary numbers in two’s complement notation, it used desk calculators that were faster at shifting than adding and created the algorithm to increase their speed, then both the results are verified in Verilog hardware description Language.
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